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Issue 160 November 2003
Timing (Analysis) is Everything
A How-To Guide for Timing Analysis


HOW IS IT DONE?

Timing analysis has been achieved in many different ways over the years. You can use anything from a manual approach (i.e., using spreadsheets and a drawing program or just pen and paper) to what I refer to as semimanual CAD programs. You can also use fully automatic static and dynamic timing-analysis tools.

I am visually oriented like most engineers, so I prefer to draw my timing diagrams. For the first board I developed, I used my schematic drawing tool to draw the timing waveforms. For the signal timing, I put on the diagram the minimum and maximum timing for every signal edge. Each time I changed the components in a signal path, I updated the numbers on the drawing. The next possible step in the evolution of timing analysis would be to put the timing numbers in a spreadsheet and let the spreadsheet do the calculations.

Table 2 shows the original simplified circuit analyzed in a spreadsheet format. For the set-up time calculation, use the maximum data delay and the minimum clock delay (less set-up time) to determine if the set-up time is met. For the hold time, use the minimum data hold delay and the maximum clock delay plus the hold time to see if the hold time is met. This is straightforward but time-consuming. What you need to do is to calculate each of the signal paths going to flip-flop B, for instance. The advantage of using a spreadsheet is that it saves you time when making changes to the design. A combination of a spreadsheet and a drawing seems like the right way to go.

Table 2—For the simplified circuit, the set-up time slack is equal to the minimum clock delay minus the maximum data delay. The hold time slack is equal to the minimum data delay minus the maximum clock delay.

I’m familiar with two popular semimanual timing analysis products: SynaptiCAD’s Timing Diagrammer Pro and Forte Design’s Systems TimingDesigner. These two products are roughly similar. The timing diagrams in this article use Timing Diagrammer Pro.

The Timing Diagrammer Pro is a timing analysis tool designed to assist the digital designer in modeling and analyzing digital circuits. (Another tool from SynaptiCAD is Waveformer Pro, which also allows you to export waveforms as VHDL or Verilog for simulation purposes.) It has two main windows for analysis, the first of which is the diagram editor window where you draw the waveforms. There are special tools to help with clocks, and you can create waveforms from other waveforms. You can do so with a Boolean equation—(SIG0 and SIG1 and SIG3) delay 20 ns—or it can be specified using VHDL or Verilog. The other important window is the parameter window, which is like the aforementioned spreadsheet; it holds the timing parameters of the design. The power of Timing Diagrammer Pro is that the parameter values and the timing waveforms are linked.