November 2000 , Issue 124

A PIC17C44-Based Computer

TABLRD and TABLWR

The TABLRD and TABLWR instructions allow external memory to be read or written. The loader in internal memory writes downloaded program code to external memory. Data memory in U7 can be read or written. These instructions use the address latch to determine the address of the instruction word or data byte by latching an address held in a 16-bit SFR pair called the table pointer (TABLPTRH and TBLPTRL).

The instruction, or data, is read into or written from another SFR pair called the table latch (TABLATH and TABLATL). Sixteen-bit data can be read from internal or external program memory, but should not be written by the application code. It should be used only for constants that are coded in the source program.

THE DAUGHTERBOARD

The daughterboard consists of four independent sections that can be separated for mounting (see Figures 2 and 3). These are the power supply, the RS-232 level converter, the RS-422/485 level converter, and the keypad/LCD/piezo buzzer interface.

J1 pins 1 and 4 provide for power and ground from J13. Pin 2 connects to an open-collector transistor that can drive a piezo buzzer. An active-low interrupt request can connect to pin 3.

J2 is a 34-pin header that connects to the motherboard. J3, a 16-pin header, connects to an LCD. Note that the pinout is the mirror image of the LCD pinout so that a matching 16-pin header connector can be used on the solder side of the LCD board.

The 9-pin header that connects to a matrix keypad is J4. The pinout probably will not match that of your keypad. J5 and J7 are 6-pin headers to connect one of the level converters to J3 on the motherboard.

Next is J6, a DB-9 connector for RS-232 serial I/O. J8 is a 5-pin header for RS-422/485 serial I/O.

And, J9 selects RS-422 (jumper pins 1 and 2) or RS-485 (jumper pins 2 and 3). Finally, J10 and J11 can be jumpered to bias the line in a mark state when using RS-485.

RB<7:0> are used as the data bus for the LCD and keypad. RA0 is an output that can be used as an active-high interrupt request by the PIC17C44. RA3 is an input used as the RS line for the LCD and also clears the CS7 and WR latches when pulsed low.

One of the CS lines will pulse low when a TABLRD or TABLWR instruction is executed with an address in the range 6000:FFFF. The WR line pulses low when a TABLWR instruction is executed. OE pulses low during every instruction cycle, but is not used. The low-order bytes of the address bus (RA<7:0>) and the address/data bus (RAD<7:0>) are not used.