October
2005, Issue 183
The
Silicon Wallet
CY8C27443-Based
Data Manager
BLOCK
DIAGRAM
The
input signal sensed by the phototransistor includes
very low frequencies; therefore, the sensor amplifier
in Figure 2 is DC coupled. The amount of DC superimposed
to the signal varies depending on ambient illumination
and PC monitor characteristics. To remove the DC component,
a 6-bit DAC generates a variable DC offset, which is
subtracted from the input by the offset control block
at the input of the main amplifier. A specialized software
routine calculates the exact amount of DC that should
be removed. Thus, at the output of the amplifier, you
get only the modulation component of the original signal.
The amplified signal then passes through a low-pass
filter, which removes the high-frequency noise from
the horizontal video raster and the environment.
|
(Click
here to enlarge)
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Figure
2—The signal from the phototransistor is DC-coupled
to the input amplifier. A 6-bit DAC supplies the
DC offset to compensate brightness variations. A
low-pass filter cleans the signal before it’s digitized.
An 8-bit monostable timer repairs the pulsed signal
from CRT monitors. A 16-bit timer is used for pulse-width
measurement. The blue blocks are software implemented. |
The
output from the filter goes to an 8-bit A/D converter
that digitizes it. The bitstream rebuilder generates
a logic value (sensor illuminated or dark) comparing
the 8-bit input level coming from the A/D to reference
thresholds and adding hysteresis. It also uses a monostable
based on an 8-bit timer to fill the gaps in the pulsing
signal caused by the frame refresh rate on CRT monitors.
The next block is the code word decoder that monitors
the binary signal produced by the rebuilder. It measures
bit intervals in order to reconstruct a 10-bit code
word according to the transmission-encoding scheme.
It uses a 16-bit timer to handle possible timeouts.
Reception
errors may occur because of the nature of the transmission
process and unpredictable response times of PCs. Thus,
the code word generated by the decoder passes through
a Hamming error correction block right after reception.
The Hamming block can recover all single-bit errors.
The resulting 6-bit wide keystroke data is now ready
to be used by the main application. (For more information
on this subject, refer to my short article, “Hamming
Error Correction,” which is available on the Circuit
Cellar FTP site.)
The
user controls the device with a quadrature encoder,
which is used for composing a five-digit access number
and for browsing through the pages of information stored
in memory. Given the low data rates required, the encoder
block takes advantage of the PSoC’s ability to generate
interrupts on a pin change and it implements a driver
with an ISR. The main application orchestrates the LCD
block to display relevant information, the EEPROM (a
flash memory emulation) to store the user pages, the
encoder to interact with the user, and keystroke data
from the blocks to receive and edit new information
from the PC.
