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October 2005, Issue 183

The Silicon Wallet
CY8C27443-Based Data Manager


SIGNAL PITFALLS

The signals involved in this design aren’t particularly simple. CRT and LCD monitors work according to different processes. Although the images look similar to a human eye, the difference is evident from a phototransistor’s observation point.

Photo 3 shows the signals captured from a CRT monitor (top trace) and an LCD monitor (bottom trace). The test starts with a flashing rectangle (left) and ends with the rectangle still white (right). What you perceive as a continuous light level in the case of a CRT monitor is actually a series of bright flashes at raster frequency—from 50 to 120 Hz depending on the VGA card.

(Click here to enlarge)

Photo 3—The input signal changes dramatically (in terms of waveform, amplitude, and DC offset) depending on the type of PC monitor. This test starts with a dark rectangle (black) flashing to white nine times. It ends with the rectangle being constantly illuminated. The top trace shows the signal captured by the phototransistor on a CRT monitor. The bottom trace shows the results of the same test performed on an LCD screen.

Conversely, the signal from the LCD monitor is continuous and greatly attenuated (I suppose its amplitude is close to the average energy level of CRT spikes). It also requires considerable time for changing from black to white. The opposite transition is much faster, making the waveform asymmetrical. Note that the black level of LCD monitors varies significantly from brand to brand.

Both monitor technologies influence the design of a data transmission scheme. LCD monitors require substantial amplification and compensation of the DC offset superimposed to the signal. The difference in rise and fall times for LCD monitors suggests using the same edge to measure intervals. The signals picked up from CRT monitors are ample, but they need additional circuitry to fill the gaps between two consecutive peaks in order to reconstruct the original signal.

The frame refresh rate (vertical raster frequency) produces a more subtle effect that must be taken into account for both monitors. The frame refresh rate is the time it takes for a full picture to pass from the video memory to the screen. This time can introduce significant jitter to the output stream (up to 16.7 ms for each transition at a 60-Hz refresh rate). Although some graphics drivers provide hooks to synchronize to video refresh (they’re useful for playing video and animation), the design objectives require the system to be platform-independent and forbid you to resort to drivers or installation software.

Besides the intricacies related to the inner workings of video, the system must cope with the errors generated by the PC. Browser timings are far from perfect. The operating system can delay a screen update from time to time, disturbing an ongoing communication. In this case, automatic error detection and correction can be useful features.

I devised a transmission scheme that uses white as the default rest level and black as the active level. This simplifies the process of determining the exact amount of DC before transmission starts, setting the working point close to saturation. A logic 1 is represented with a 45-ms black pulse followed by another 45-ms white pulse (see Figure 1). A 90-ms black pulse followed by a 45-ms white pulse represents a logic 0. Data is transmitted in 10-bit code words plus 1 stop bit (11 pulses in total). The stop bit is always 1. Its purpose is to provide an extra edge for improved interval measurements especially on LCD monitors.

(Click here to enlarge)

Figure 1—Typical serial encoding schemes won’t survive the unpredictable delays of the JavaScript interpreter, operating system, and video frame-refresh circuitry. Therefore, each bit is encoded with an ample timing margin and the 6-bit data is encapsulated in a 10-bit Hamming code word capable of detecting and correcting single-bit errors. A Stop bit provides an extra edge to improve reception.

The 10-bit code word contains 6 bits of data and 4 parity bits encoded according to the Hamming code H(10,6). This code is capable of self-correcting all single-bit errors and detecting some multiple-bit errors.