Issue 147 October 2002
Watch Me Pull A Rabbit Out of My Hat

Start • Rabbit 3000 • No-Risk CISC • Peck-O-Periphs • Time Traveler • One-Stop Shopping • Keep Motoring • Sources and PDF

PECK-O-PERIPHS

The Rabbit 3000 has 128 pins to play with. That’s 28 more than the Rabbit 2000, twice as many as the ’180, and more than three times the 40-pin originals.

Two-dozen of them are devoted to power and ground, notably because of the fact that separate power supplies (though both 3.3 V) are used for the processor core and I/O. That minimizes the leakage of EMI generated by the former out of the latter. Note that inputs are 5-V tolerant, which is something that’s still useful in the embedded world.

The remaining pins are divided between the external memory bus and various I/O functions.

As for the former, the Rabbit 3000 is designed to use standard byte-wide memories, typically SRAM and flash memory. The 20-bit address bus and 8-bit data bus are supplemented with the familiar control lines (*CS, *OE, *WE) for direct no-glue connection to as many as six commodity memory chips. Note that support for dynamic RAM, which made sense in the old days when DRAM densities were measured in kilobits, is arguably no longer relevant for 8-bit chips and has been eliminated.

The on-chip I/O functions are given seven 8-bit ports (A through G) to play with. As usual, particular ports can take on dedicated I/O functions or be used as generic parallel I/O.

If you’ve ever wished you had an extra serial port (and who hasn’t?), the Rabbit 3000 is the chip for you with a whopping six on tap. Now, it isn’t likely that you’ll need to use all six as UARTs (with IRDA format thrown in for good measure), so four of them can work as SPI clocked serial ports instead. This is especially handy for using multiple clocked serial peripheral chips without having to multiplex the connection externally. Furthermore, two of the ports even include SDLC/HDLC capability for applications that need to connect to the wider world of LANs and WANs.

Another I/O option is a slave interface comprised of an 8-bit bidirectional port and a few address and control lines. This provides a handy way to connect a Rabbit 3000 to another processor, which could be another Rabbit 3000, but doesn’t have to be. A simple dual-port register mechanism makes it as easy to talk to the CPU as any conventional peripheral chip.

Historically, external I/O and memory chips all would connect to the same data and address lines. That option is available for the Rabbit 3000, as well; however, the chip also offers an auxiliary I/O bus mode that splits I/O operations onto their own 8-bit data/6-bit address bus.

This provides benefits that may prove compelling in certain designs. For example, if top performance is your goal, you’ll likely find (as usual) that memory access time is a concern. Moving I/O devices onto their own bus reduces capacitive loading on the memory bus that would otherwise slow things down.

Similarly, although the Rabbit 3000 can tolerate 5-V inputs, a particular 3.3-V memory chip might not be so obliging. If mixing 3.3-V memories and 5-V I/O chips on the same bus proves to be problematic, then splitting the busses is the way to go.

Finally, practical product evolution and packaging considerations often call for an I/O bus or backplane that is physically accessible and expandable. Both of these criteria can compromise critical memory bus performance and raise EMI concerns. With the split bus scheme, the relatively quiet auxiliary I/O bus can act as the backplane for external add-ons, while the faster and noisier memory bus can be kept tight and light (i.e., in close proximity with the CPU and minimally loaded with only a few memory chips).