Table 1—There are different SPI1 clock settings for the various crystals and sampling rates.
| Crystal frequency | PCLK = MCLK | Audio sampling frequency Hz | Theoretical bit rate (Hz) | Theoretical clock divider |
Real divider CSPDVSR |
Error |
| 11.2896 MHz | 56.448 MHz | 44,100 Hz | 1,411 200 | 40 | 40 | 0% |
| 12.000 MHz | 60.000 MHz | 44,100 Hz | 1,411,200 | 42.517 | 42 | 1.20% |
| 12.288 MHz | 61.440 MHz | 48,000 Hz | 1,536,000 | 40 | 40 | 0% |