August
1998, Issue 97
BitScope
A Mixed-Signal Capture Engine
DESIGN
PHILOSOPHY
A
good place to start designing is with a functional specification.
For BitScope, the main issue was sample rate. While
it seemed clear that a 200-MHz sample rate was out of
reach, I could easily get to about 50 MS/s and still
be ahead on the price/performance curve.
For
the engineer dealing with microcontroller circuits,
it’s unlikely that frequencies of interest will
exceed 20 MHz—at least for the time being. Later
on, when 3-V logic becomes more prevalent, that 50-MS/s
rate can probably stretch to 100 MS/s in an SMT version
of the design.
To
make BitScope as useful as possible, I was determined
that it should physically stand alone. It needed to
be unconstrained to a particular machine or bus standard,
and I wanted it to communicate with any computer using
the ubiquitous RS-232 interface.
From
my experience, the most commonly required features of
this type of test equipment are two analog input channels
and eight digital logic inputs. Combine those features
with a flexible trigger capability, and you get a pretty
useful instrument. I set a design goal of about $100
for the cost of required components, all of which should
be readily available.
For
the core of BitScope, I selected a PIC16F84 micro tightly
coupled with a Lattice 1016 PLD. The PIC controls the
serial port and implements a VM architecture. The Lattice
counts RAM addresses and waits for a trigger.
These
chips are cheap and solid performers. Both are flash-memory
based for easy upgrades, and they have excellent entry-level
development software. Sample RAM is provided by two
32-KB 15-ns cache memories.
These
devices will take the design to 50 MS/s and have the
great advantage that about eight of them are perched
on every ’486 motherboard ever built. That should
put their head count at about one billion, so don’t
tell me you can’t find any!
Every
DSO must be built around a flash ADC. These chips were
exotic until a few years ago when digital manipulation
of video became popular.
Now,
several companies have devices that can provide 40 MS/s
or better for less than $10. Even an older device like
Motorola’s MC10319P can sample from DC to 25 MS/s
and is available in a DIP package.
In
fact, I used this device for BitScope. By selecting
a 600-mil DIP package, I could accommodate any of the
new SMD devices as a plug-in module and avoid the need
for multiple PCB versions.
For
vertical amplifiers that process analog signals to the
ADC, the video industry again provides a solution. Maxim
and Analog Devices both have cheap, stable 300-MHz op-amps
that make wide-band amplifier design easy.
Using
these devices lets the vertical-amplifier bandwidth
get close to 100 MHz, matching the input specs on the
new flash ADC chips from Analog Devices and TI. For
an insight into why we need such wide-bandwidth vertical
amplifiers, see the sidebar "Subsampling—Bending
Nyquist."
| Subsampling—Bending
Nyquist
In data-acquisition
applications, there is often some confusion
about the relationship between bandwidth and
sample rate. The Nyquist rate of half of the
sampling frequency (Fs) is well known
to be the maximum frequency that can be captured
by periodic sampling at Fs. Given that
mathematical constraint, why would we want an
instrument that has a bandwidth of 100 MHz and
yet samples at a maximum rate of only 50 MS/s?
The answer lies with subsampling.
The Nyquist rate
applies to continuous time varying signals.
In that general case, the highest-frequency
component should be less than half of Fs
(25 MHz at 50 MS/s) to avoid aliasing. Repetitive
waveforms are a different matter. They’re
the only high-frequency waveforms you ever see
on an analog CRO. The same waveform is redrawn
each sweep, and the eye sees a solid trace.
Subsampling is similar. You use multiple samples
and overlay them to build an image. Providing
that your ADC has a wide bandwidth and a small
aperture, it is possible to sample a repetitive
waveform over many cycles and build up a snapshot
of the exact waveform, limited only by the bandwidth
of the signal path. This technique, known as
subsampling, is just an example of the RF mixer
in the digital world.
Subsampling has
a few constraints. It isn’t possible to
subsample a waveform that’s harmonically
related to the sampling frequency. Practically,
this means that if the waveform of interest
is related to the sample frequency, the sample
points always fall at the same relative position
on the waveform and the regions between will
forever remain a mystery.
Another concern
has to do with resolving the ambiguous period
of the subsampled waveform. Let’s say you
have a signal of 28 MHz and are sampling at
40 MS/s. In the sample buffer, you’ll see
a sequence of values with components at 12 and
68 MHz. How can these be plotted to build up
a profile of the original 28-MHz signal? Well,
if you can measure the fundamental frequency
of the sampled wave, that will imply period.
Since you know the sample rate accurately, you
can fractionally chop the sample buffer up into
segments of n wave periods and then plot
them overlaid. You will have traded the freedom
for those n waveforms to vary in exchange
for n different points on the waveform.
It may now be apparent why the BitScope design
has provision to measure the frequency of any
signal presented to the ADC.
Even if you can’t
measure the frequency of a subsampled waveform
directly, all is not lost. DSP engineers have
some fancy autocorrelation algorithms that can
be let loose on a chunk of acquired data to
pull a waveform out of meaningless numbers.
It is important to note, however, that for resolving
single event (such as high-frequency pulses
like logic glitches), there is only one solution:
oversample by at least a factor of 10. This
performance is exclusively in the domain of
specialized test equipment using state-of-the-art
circuit techniques to resolve samples to 1 ns
or better.
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