Issue 157 August 2003
Spotlight on Renesas H8 Family
Hitachi and Mitsubishi Market MCUs for Embedded Systems

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H8S SERIES

The H8S/2000 series CPU has a 32-bit architecture that can cover a 16-MB address space. Address space can be divided into eight areas each with separate bus specifications. Enhanced addressing and instructions help to make full use of the address space and 32-bit data registers.

A DRAM interface handles up to 8 MB of DRAM. A direct memory access (DMA), data transfer controller (DTC), and timer pulse unit (TPU, which is similar to the ITU), and programmable pulse unit (PPG, which is similar to the TPC) are added to the standard UART, ADC, and DAC peripherals.

The ’2329 series takes on applications that require more processing power. You’ll find it useful for touch-screen controllers, CD R/W drives, medical monitors, LAN hubs, GPS systems, and bar code scanners.

The DRAM interface produces all of the CAS and RAS signals to support external DRAM in address areas two through five. The on-board bus controller allows external devices requiring different bus specifications to live in harmony by segregating them into one of eight address areas. Each of these areas can have specific wait states generated for them.

The bus master also arbitrates bus rights between the CPU, DMAC, DTC, or an external bus controller. The DMAC can transfer up to 64 KB of byte/word data once in a block move (or to the same address), or it can repeat the operation continuously. DMA Short mode uses an 8-bit source and 24-bit destination, and Long mode uses a 24-bit source/destination. Therefore, the DMA has resources for four short or two long DMA channels that run simultaneously.

The DTC is similar to DMAC because it’s used for transferring data. However, unlike the DMAC, the registers used for transfer control are located off the DTC and in (on-board) RAM. Although the throughput is nearly six times slower, it is not limited to the 4/2 channels of the DMAC.

The 16-bit TPU has six timer channels. The TPU allows for the synchronizing of the timers (i.e., multiple synchronized PWM outputs) and triggering of the PPG. The PPG can output 16-bit data (groups of 4 bits) synchronized with the TPU.

 In addition to the three standard UARTs, the ’2329 contains an SC interface. The asynchronous serial clock and data I/O format of the SC interface is similar to the asynchronous UART 8-bit format with parity, except the receiving device can indicate a parity error (during the normal stop bit time) for an automatic retransmission of data.

There are two clock speeds available for program execution:  Active High Speed mode and Active Medium Speed mode.

The ’2329 has three power-down states to reduce power consumption. Like the H8/300H series, the H8S series features Sleep, Hardware Standby, and Standby modes. Additionally, the H8S series includes Programmer and Boot modes.

In User mode, flash memory programming is handled via user program control by 4-, 32-, and 64-KB block erasures and 128-byte block writes. 

Because this series handles up to 64 KB of code and the ’3048 has 128 KB of flash memory, this method cannot be used directly to program the additional 64 KB. You must supply code for a new boot format. 

 

SUPPORT TOOLS

Renesas offers products to cover each stage of your H8 development. Low-cost or no-cost tools enable quick investigation of H8 capabilities. The Hitachi Embedded Workshop (HEW), which is a software and debugging environment, puts the power of your PC to work by providing a familiar GUI atmosphere in which to write your application. You can use assembly or C/C++ to assemble or compile a file that’s ready for downloading on known working hardware (either your own design or one of the many evaluation boards).

Photo 1 shows the HEW environment on my laptop. From here I can create a project, edit it, make it, and debug it. HEW is free (sorta, kinda). It comes bundled with some evaluation kits, and it’s either time or size limited. If you want the full version—which includes a simulator, profiler, map editor, and stack analyzer—you will need to upgrade through a distributor.

(Click here to enlarge)

Photo 1—Renesas’s HEW has the GUI interface most software engineers are familiar with. Project generator wizards help you move through configuration options quickly, so you can get right at the application code.

The Hitachi Debugging Interface (HDI) launches from the HEW. With the HDI, you have a common GUI to any of the supported debugging platforms, a ROM-resident monitor, an on-chip emulator, or an in-circuit emulator. The serial port allows you to download a ROM monitor and take control of executing your code. You can read/write registers and memory as well as execute your code with a breakpoint. On-chip emulators connect via resources built into the target hardware to provide a debugging interface for real-time debugging. The PCI- or PCMCIA-based emulators offer 255 breakpoints, multiple-level execution trace, and source-level debugging.

For advanced real-time debugging, an in-circuit emulator presents more ways to track down illusive bugs. Emulation memory is mapped to the target processor’s address space, the 32-KB trace buffers can be examined during execution, and event sequencing is possible via a complex event system (CES). The CES lets you specify the exact set of conditions you want to examine. Break, trace, or timing functions are triggered using event or range criteria. Up to 12 hardware breakpoints can be triggered via complex event and range conditions or four user-logic inputs.

The event sequencer is used to generate an event based on the proper sequence of other events. This flexibility gives the in-circuit emulator the means to track down even the nastiest of bugs.

If you merely want to get your code into an H8 without all the emulating hardware, the flash memory development toolkit (FDT) is a free stand-alone, easy-to-use utility. The FDT uses the aforementioned in-circuit programming functions. The MPU uses a serial interface and has a built-in boot function, which allows the flash memory to be erased and code to be downloaded and executed.

After a program exceeds the 64-KB size of the internal boot code loader, things get more complicated. The FDT takes care of downloading a boot kernel to takeover from the boot code and handle the programming of larger flash memories.