Issue
157 August 2003
Spotlight
on Renesas H8 Family
Hitachi
and Mitsubishi Market MCUs for Embedded Systems
FAMILY
ARCHITECTURE
The
H8 uses a general-register architecture that consists
of control and general-purpose registers (see Figure
2). The entire family has 57 basic instructions that
treat the general registers as both data and address
registers. The eight general-purpose 16-bit wide word
registers (R0 through R7) are accessed as eight high-byte
and eight low-byte registers (R0H through R7H, and R0L
through R7L). The last register, R7, serves as the stack
pointer that controls the stack space.
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(Click
here to enlarge)
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Figure
2—The H8 family CPU is register-based. The general
registers can be used as data and address registers.
The control registers include a 16-bit program PC
and a CCR. Note that upwardly compatible devices
add to this base architecture. |
The
control registers include a 16-bit program counter (PC)
and an 8-bit condition code register (CCR). The PC’s
least significant bit is ignored for all instruction
fetches because everything is based on 16-bit instructions.
The CCR holds the status of operations except for the
interrupt mask bit (I). Upwardly compatible family members
add extra functions to the basic CPU (i.e., 32-bit double-word
registers).
The
16-bit values are stored MSByte first on the even address
boundaries. The H8 family uses eight addressing modes:
Direct; Indirect; Indirect with displacement; Indirect
with postincrement or predecrement; Absolute; Immediate;
PC Relative; and Memory Indirect.
In
Direct mode, the register field of the instruction specifies
an 8- or 16-bit general register containing the operand
(MOV R0, R1). Indirect mode has the register field of
the instruction specifying a 16-bit general register
containing the address of the operand in memory (MOV
R0, @R1).
The
Indirect with displacement mode is similar to Indirect
mode. However, a second word (bytes 3 and 4) contains
a displacement that is added to the content of the specified
general register to obtain the operand address in memory
(MOV R0, @(2:16,R1).
Indirect
with postincrement or predecrement mode is also similar
to the Indirect mode, but the general register containing
the operand is either incremented after the instruction
is executed or decremented before the instruction is
executed. Byte registers increase and decrease by one.
Word registers increase and decrease by two (MOV R0,
@-R1).
In
Absolute mode, the in-struction specifies the absolute
address of the operand in memory (MOV R0, H’FF00’: 16).
Immediate mode uses the 8- or 16-bit value within the
instruction as the operand (MOV #H’1000’: 16,R1).
When
the program flow is interrupted by a branch instruction,
the new PC value is based on the old PC and a displacement.
PC Relative mode allows branching by byte or word displacements
(BEQ @(+10:16,PC)). Jump instructions can use Memory
Indirect mode, in which the instruction holds the absolute
address of a location where the operand is located in
memory (JMP @@(#H’0010’: 16)).
The
H8/300L MCU has 57 instructions including multiply (byte
× byte) and divide (word/ byte). Table 1 separates these
into their respective functions. There are four basic
MCU states. Figure 3 shows how these states relate to
one another.
| Table
1—Although POP and PUSH are available instructions,
they are identical to a MOV using indirect with
postincrement or predecrement addressing (i.e.,
MOV.W R0, @-SP). |
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(Click
here to enlarge)
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Figure
3—The MC has four states. Now you know where execution
can be transferred between states. |
Any
state applying power or activating the hardware reset
can place the MCU in the reset state. When released
from reset, state transfer can only go to the exception
handler state, which can execute priority code and transfer
control to the program execution state or place the
MCU back in reset state.
The
normal code execution is performed in the program execution
state. From the program execution state, control can
transfer to the reset state, exception state, or program
halt state. The program halt state has various power-reduction
modes and can only transfer to the reset state or the
program exception state.
