Issue 144 July 2002
Driving the NKK Smartswitch

Part 1: Configuration and Software

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Start • Hareware Interface • Module Implementation • Sources & PDF

HARDWARE INTERFACE

The backlight of the LCD consists of bicolor LEDs. When current passes in one direction, the backlight color is red; when it passes in the reverse direction, the color is green. Toggling from red to green at the correct frequency will trick your brain into thinking the color is yellow. The backlight is turned off when there is no current.

As you can see in Figure 1a, a resistor connects each side of the LED to the same voltage supply. Different LED colors have different efficiencies. You can compensate for this by programming a different current for each direction.

(Click here to enlarge)

Figure 1a—With the backlight drivers, when port1_1 is high and port 1_1 is low, current flows through R1 and from pin 5 to pin 14 and turns on the green LED. Note that the current will still flow through R2. The red LED will be on when port1_0 is high and port 1_1 is low. Toggling at about 550 Hz will produce a yellow color. b—This is the LCD viewing angle adjustment. I used 9 VDC for VS and 1 KB for VR1.

The connections to the LEDs are totally independent of the rest of the control circuitry so this supply need not be VCC. Each side of the LED backlight is also connected to an open collector driver. When active, the driver will sink the current through the resistor on the far side of the LED and through the LED, causing the LED to turn on. The driver also draws current through the resistor on the near side, so it must be capable of sinking the total current. Note that each driver is connected to a microcomputer output. In this case, it’s connected to port 1, bits 0 and 1.

As with all LCDs, it is important to be able to adjust the viewing angle. The Smartswitch requires a simple interface with a potentiometer between a supply, as you can see demonstrated in Figure 1b. NKK recommends 9 to 12 VDC.

There are four control lines to set the content of the LCD matrix. Data is presented serially on the DIN line, and clocked into the shift register on the negative transition of the clock signal SCP. In other words, for each row of pixels, 40 bits are shifted into the DIN line and clocked on the negative edge of SCP.

The contents of the shift register are transferred to the pixel drivers on the negative edge of the LP signal. The LP signal is independent of the SCP signal, but must occur periodically with minimal jitter or the display’s intensity will vary. NKK specifies a period of 0.7 to 1.2 ms, but I found that 1 ms works best for this application.

The Smartswitch has an internal row pointer that is incremented every LP signal. This counter is reset by the first line marker (FLM) signal, which must be active (after LP has transferred the line data) for the data of the first row. There are no restrictions on pumping the data out (subject to the maximum 2-MHz clock rate), so it can be accomplished quickly. This gives the processor some processing time until it is necessary to toggle the LP signal.

You can see the timing relationships for this project in Figures 2a and b. Most of the hardware interface is achieved through peripherals that are implemented on the PSoC. But before I describe the peripherals, I’ll introduce you to the general configuration of the PSoC.

a) b) (Click here to enlarge)

Figure 2a—This is a row update. Although difficult to count here, there are 40 SCP pulses in five bursts between each LP signal. Note the 1-ms update time. b—The FLM extends from before the first data bit to the trailing edge of the LP signal. FLM becomes active before the first SCP transition for the row. You’ll see later that the LP will trigger an interrupt that flags the background program. The FLM is set in the background program. The indicated time is the time for the processor to get to the point in the program where the bit is set. Care must be taken to see that the last of the 40 bits is shifted in before the next LP signal.

PSoC

Despite the risk of dampening your enthusiasm, I want to make clear that this family of devices (and the associated tools) is relatively new. As a result, there are some minor bugs and certain aspects of the documentation have conflicting information. All in all, some features of the user interface and C compiler need improvement. However, if you enjoy the challenge of mastering a new micro, especially one with the features of the PSoC, then you’re going to love this product.

Almost every microcomputer on the market has a finite peripheral set that may include a UART, A/D converter, and timers. But if you want a micro without the ADC, you’ll have to change the device. Sometimes you can get lucky and the pinout will be the same, but you’ll still have to juggle the features and often pay for ones that you don’t need.

Fortunately, Cypress has taken a different approach. The PSoC has eight digital blocks and 12 analog blocks. Like a PLD, these blocks can be configured to provide different functions, so you can customize the microcomputer for the exact peripherals you need. In fact, the peripherals can be configured dynamically to share the configuration blocks, making them something like hardware subroutines.

The user interface, or PSoC Designer, is available for free on the company’s web site. The PSoC Designer allows you to choose between peripherals and allocate them to the analog and digital blocks on the chip. The peripherals include multichannel A/D converters (up to 12 bits), programmable gain amplifiers, comparators, D/A converters, filters, and an on-chip temperature sensor. On the digital side, there are counters (up to 32 bits) and pseudo-random number generators (up to 32 bits). In addition, there’s pulse width modulation (up to 16 bits), UART, SPI, a CRC generator, and timers (up to 32 bits). Future additions may include an I2C and USB modules.

It’s your job to supervise the allocation of these functions to the blocks and to choose the I/O pins. Remember, though, that the number of available blocks will limit the number of functions you can implement. Keep in mind that the PSoC is like any other microcomputer—it’s not a panacea. Before committing to a design, take time to evaluate the peripherals, especially the analog blocks. The analog blocks are not rail-to-rail, but rather they are 2.5 V (supply half-rail). That is, the analog zero is considered to be at 2.5 V, and the input signal may need to have a DC offset applied.

When the function module is placed and graphically configured, PSoC Designer creates the code to set up the registers needed to realize the function. All of the configuration settings are dynamic registers, so they can be overwritten to change the configuration. And this doesn’t have to be as simple as changing the gain on an amplifier, in fact, more complex arrangements could be made.

Suppose you had a converter from SPI to UART. It would be possible to interface with an SPI peripheral, gather the data, reconfigure the digital blocks to perform as a UART, and then retransmit the data on different pins. The reverse would also be possible.

Currently, PSoC Designer does nothing to enhance this. It allows for one configuration and then it’s up to you to create alternatives to overlay these functions. Cypress has decided that this feature is a competitive advantage, so they have a new version of their PSoC Designer in the wings that will simplify this process.

Cypress produces three kinds of documentation. The first is the standard datasheet, which at first glance is somewhat bewildering because of the variety of configuration options. When you select a module in the user interface, a datasheet for the module appears on the screen. In addition to samples of the code, the datasheet reading includes all the relevant registers and I/O points. As your product is configured, the PSoC Designer creates a third datasheet specifically for that particular arrangement so you have complete documentation of your product.

All of this is available in an 8- to 64-pin package for about $5. A full development environment that includes C costs less than $300. And you’d think they were paying me to say this, but unfortunately they’re not.