June 2000, Issue 107

Low-Cost Software
Bell-202 Modem

DTMF AND FSK DETECTION

Connection with the telephone network is controlled by the Ring and Hook signals, which are passed through optoisolators U5 and U6 to either establish or break the connection.

When the connection is made, data received from the network is coupled through audio transformer T1, as well as input filter and DC offset circuit to an operational amplifier, U2 (see Figure 3). The op-amp splits the single bitstream of the input into separate DTMF and FSK signals and applies them to the MCU, where they are converted from analog to digital and processed.

The DTMF signal is applied to pins RC0 and RC1 of the SX28AC. The MCU converts this from analog to digital by sampling it in software using a digital form of the Geortzel discrete Fourier transform (DFT) algorithm. Eight separate DFTs, each with an accuracy of greater than ±1%, simultaneously sample the signal looking for the row and column frequencies that identify digits within the DTMF matrix.

To be properly selective on the target frequencies, a performance level of at least 50 MIPS is required; the sine and cosine reference signals for each DFT operation are being generated in software within the interrupt service routine to enable multiple virtual peripherals to run in parallel. A clock frequency of at least 50 MHz is required to give the DFT accuracy better than the required DTMF specification of ±1.5% (i.e., the higher the clock rate, the better the accuracy).

The same DFT technique would be possible at a much lower MIPS rate, but at the sacrifice of needing to be executed in straight-line code to maintain accuracy. Additionally, the standard for the DTMF tone duration lets it be as short as 48 ms, which the SX28AC can easily handle.

The current DTMF algorithm can detect tones as short as 14 ms. By contrast, most other 8-bit MCU implementations need at least 150 ms to detect the tone because of the straight-line nature of the code.

The FSK signal from the op-amp is applied to pin RB1 of the SX28AC. Detecting the FSK data (1200 Hz representing a logic 1, and 2200 Hz representing a logic 0) and its conversion to a digital format is done by an on-chip hardware comparator and a reference level set by an external resistor voltage divider (R3, R4) using a form of zero-crossing detection. The comparator is one of the basic sets of silicon peripherals included in the SX28AC.

The digital DTMF and FSK data is processed by the software UART and transmitted to a PC through a simple implementation of an RS-232 interface. Because the connection to the PC isn’t meant to be over a long distance, a two-transistor (Q1, Q2) circuit operating at 5 V rather than the more-typical 9 V is sufficient to drive the line.