June
2005, Issue 179
Accurate
Capacitance Meter
Cypress
PSoC High Integration Challenge 2004 Contest Winner
by
Alexander Popov, Jordan Popov, and Peter Popov
PSoC
CONFIGURATION
The
CY8C27443 mixed-signal array has eight digital and 12
analog programmable blocks. Trying to leverage as much
as we could from the CY8C27443’s high level of integration,
we ended up using all of the digital blocks and more
than half of the analog blocks. Exactly half of the
CY8C27443’s capacity (four digital and six analog blocks)
is involved in measurement; the rest is needed to implement
the UART and self-calibration (see Figure 3).
|
(Click
here to enlarge)
|
Figure
3—The PSoC’s versatility and flexibility are evident
in the internal configuration. All of the various
components of the DC capacitance meter are implemented
internally. |
The
PSoC allowed us to design a tightly integrated application.
Technically, we could have got away with just the PSoC
and a single external resistor for the current source,
but that would have meant no display and probably would
have left us wondering whether a measurement had occurred
even if no one had seen it. Zen aside, it does wonders
as a proof of concept.
Let’s
focus for a moment on the CY8C27443’s global resources.
We used an external 32,768-Hz crystal to form the system
clock (SysClk). The VC1 clock source is set to 2 MHz
(SysClk/12) and used to clock the PSoC’s analog blocks.
The VC2 clock source, which is set to 153.5 kHz (VC1/13),
clocks the UART to 19,200 bps. VC3 is equal to SysClk
and clocks Timer32. Analog power is set to SC On/Ref
High to provide maximum speed and reliability of the
analog blocks. Ref Mux is set to (VDD/2)±BandGap.
