Issue 142 May2002
I-Way the Hard(ware) Way

---

---

Start • Protocol Power Trio • The Proof is in the Surfing • Sources & PDF

A study by ACNielsen in 2001 found that nearly half a billion people worldwide now have Internet access. Does that put more pressure on embedded devices to get on the Internet bandwagon? You bet your bippy! My opinion is that everything with an electron moving wants to be on the Internet. Market potential is unlimited on the demand side. But, as Econ 101 reminds us, it’s only realized to the degree that the supply side delivers and the price is right.

For some time now I’ve been keeping a close eye on the bleeding edge of embedded Internet technology. One of the most interesting takes on the subject was the Seiko 7660A chip I covered in 1999 (Circuit Cellar 111). Exploiting hardware protocol technology from iReady set the ’7660A apart from the software-stack crowd.

Although I don’t think they’re shipping billions yet, the ’7660A has appeared in enough designs to reinforce interest in, if not prove, the hardware protocol stack concept.

Frankly, I’ve been waiting for another hardware-centric shoe to drop. Wait no more. Say hello to the new chip on the embedded Internet block, the W3100 from i2Chip (see Figure 1).

(Click to enlarge)

Figure 1—Following the iReady/Seiko 7660A, the i2Chip W3100 is the second hardware Internet chip to hit the street.

MII WAY

Generally speaking, the W3100 is similar to the ’7660A. Both are made up of the same four blocks: host interface, network interface, protocol processing, and buffer SRAM. However, going beyond a superficial comparison reveals that the chips are actually quite different in terms of suitability for a particular application.

The most compelling difference is the choice of networking. The Seiko chip was designed for dial-up access while i2Chip targets Ethernet. The difference in network speed (i.e., 56 Kbps for a modem versus 10 or 100 Mbps for Ethernet) percolates through all aspects of the W3100, starting with the network interface itself.

The ’3100 incorporates the 802.3u standard media-independent interface (MII). This spec originated with the desktop Ethernet crowd as a way to allow a single Ethernet media access controller (MAC) to work with the various physical layer options. For example, a 10-Mbps setup can run the nibble-wide MII bus at 2.5 MHz (or alternatively, a single-bit bus at 10 MHz) while 100 Mbps runs it at 25 MHz. Note that the clocks are sourced by the physical interface (PHY), so the difference is transparent to the MAC (i.e., the ’3100).

I could say more about the MII, but I covered it in last month’s article on the Intellon HomePlug powerline networking chip. The merit of the scheme is reinforced by the fact that it would be just as easy to connect the ’3100 to the Intellon chip as it is to connect it to a traditional Ethernet PHY.

All of the networking horsepower passes the bandwidth buck to the ’3100 host interface and internal buffering requirements, lest they become bottlenecks. Thus, the ’3100 includes 24 KB of SRAM for on-chip buffering, versus 10 KB for the ’7600A. Because reception is always more dicey than transmission (the former can’t be scheduled), the buffer breakdown is asymmetric with 16 KB for receive and 8 KB for transmit.

Similarly, the ’3100 can handle up to four sockets (i.e., a virtual full-duplex connection between a pair of IP address and port designators) whereas the ’7600A can only handle two. The difference could be key if simultaneous access by multiple clients (or a single client using multiple protocols) is required.

Both the ’7600A and ’3100 use a simple byte-wide host interface. The difference is that the ’3100 offers direct addressing to the on-chip RAM and registers with a 15-line (A0–A14) address bus. Wait states shouldn’t be a problem thanks to speedy access times (22 ns for reads and a mere 10 ns for writes). By contrast, the ’7600A was able to get by with a much slower (but adequate considering modem line speed) indirect addressing scheme.

Although the ’3100 runs on a 3.3-V supply, the I/O lines are 5-V tolerant, easing interface to existing designs that use the higher voltage. Note that power consumption is a mere 2 mA (typical at 3.3 V), so Internet enabling an embedded gadget doesn’t have to bust the power budget. Contrast that with higher-end alternatives (e.g., embedded PCs) that can easily consume 100 times that amount of power.