PARALLEL
PORT I/O
I provided parallel port I/O to communicate with the
host. The XS40 board provides eight parallel port
data inputs and five status outputs. Reserving a few
for debug I/Os, I used six inputs and four outputs.
During
lb rd,FF41, the PARIN input peripheral is selected,
driving the inputs 00 || PAR_D5:0 onto D7:0 (see Figure
5).
|
|
| Figure 5—The XIN8 (PARIN) implementation
shows the CTRL decoder output LDT that enables
the input byte to be driven onto the data
bus. |
During
sb r1,FF21, the PAROUT output peripheral is selected,
capturing the store data D3:0 in flip-flops, which
drive the PC_S6:3 status outputs.
XOUT4
is as simple as XIN8. It has a DCTRL decoder, of course,
and clocks D3:0 on LCE (LSB clock enable). This parallel
port requires only three CLBs, eight TBUFs, and 10
IOBs!
ON-CHIP
RAM
XSOC also includes a 16 × 16-bit RAM peripheral. It
uses all of the DCTRL outputs: A4:1 to select the
word to read or write, LCE and UCE as lower and upper
byte write strobes, and LDT and UDT as lower and upper
byte output enables.
