May 2000, Issue 118
Building a RISC System In AN FPGA Part 3: System-on-a-Chip Design
Start • XS40 Board • A System-On-A-Chip • Decisions,Decisions • Bus Controls • Bus Interface • External I/O Interface? • MEMCTRL Design • Paralell Port I/O • Video Controller • System Bring-Up• Series Wrap-Up • Software and PDF
SOFTWARE
You may download more information, including specifications, source code, schematics, and links to related sites from the Circuit Cellar web site.
REFERENCE
[1] VGA Signal Generation with the XS Board, XESS App Note www.xess.com/fpga/vga.pdf
SOURCES
XESS XS40-005XL www.xess.com/fpga
FPGAs, Student Edition tools Xilinx, Inc. (408) 559-7778 Fax: (408) 559-7114 www.xilinx.com
Download a PDF of this article.
