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Issue 153 April 2003
E-Chips


TINI THE TIGER

Last up is the Dallas (now Maxim) DS80C400. It starts with the 80C390 hyper-’51 core, which you may be familiar with. Even though it can mimic a traditional ’51, the ’400 goes way beyond the original with four-clock (versus 12-clock) operation at up to 75 MHz, large 16-MB address space, multiple data pointer registers, a 16/32-bit math accelerator, and so on.

It also has an expanded complement of the traditional ’51 peripherals, including four timers and three serial ports, the latter of which comes with IRDA capability. Other additions include a one-wire controller for the company’s clever multiplexed power and data scheme, a CAN interface (there it is again), and, of course, the 10/100 MII Ethernet MAC.

There’s 9 KB of SRAM for scratchpad and Ethernet buffers, but the ’400 really stands out from the crowd by virtue of its 64-KB ROM that codifies a surprising amount of functionality. Sure, there’s a serial monitor with the usual commands (e.g., display memory, load a .hex file, etc.), but that’s just the beginning. In fact, there’s also a TCP/IP stack that seems quite serviceable (even including some IPV6 functionality) considering the relatively small size of the ROM.

In turn, TFTP (a simplified file transfer protocol) is layered on top to provide a NetBoot capability (see Figure 3). That means at reset the ’400 can download its code from the network, which has a number of ramifications, the most obvious being easy application code fixes and upgrades. Network booting also gives you the option of just using RAM to store both the application code and data. Alternatively, the feature has enough smarts to program certain types of flash memory chips as well.

(Click here to enlarge)

Figure 3—The hardware is nifty, but the Maxim 80C400 is unique by virtue of its on-board ROM-based software suite including built-in network boot capability.

Hooks are provided for your own application code to call useful routines in the ROM. These include networking (e.g., sockets, DHCP, TFTP, etc.), utility (e.g., initialization, random number generator, and one-wire driver), and even a tiny RTOS.

According to the web site, a ’400-based version of the (currently ’390-based) tiny Internet interface (TINI) development board will be available soon—likely by the time you read this because the schematics are already posted.

SOFT SELL

There you have it: five E-Chips ready and willing to do your embedded-network bidding. Thanks to the march of silicon, all of these look like a snap to design in. One caveat though: it appears the hardware side of the equation is much simpler than the software. 

The fact is, when it comes to TCP/IP stacks and such, it’s hard to discern claims from reality. As odd as it may seem, the networking software arena is remarkably devoid of formal performance and compliance testing. It’s pretty much a “plug-it-in-and-see-what-happens” situation. Oh well, I suppose it wouldn’t be an E-Ticket ride if it wasn’t a little scary, right?