Start • Pipelined Execution • Memory Accesses • Branching Out • Interrupts • Control Unit Design • Decode Stage • The Execute Stage • PDF

Last month, I discussed the instruction set and the datapath of an xr16 16-bit RISC processor. Now, I’ll explain how the control unit pushes the datapath’s buttons.

Figure 2 in Part 1 (Circuit Cellar, 116) showed the CTRL16 control unit schematic symbol in context. Inputs include the RDY signal from the memory controller, the next instruction word INSN15:0 from memory, and the zero, negative, carry, and overflow outputs from the datapath.

The control unit outputs manage the datapath. These outputs include pipeline control clock enables, register and operand selectors, ALU controls, and result multiplexer output enables. Before designing the control circuitry, first consider how the pipeline behaves in both good and bad times.