DATAPATH RESOURCES

The instruction set evolved with the datapath implementation. Each new idea was first evaluated in terms of the additional logic required and its impact on the processor cycle time.

To execute one instruction per cycle you need a 16-entry 16-bit register file with two read ports (add r3, r1, r2) and one write port (add r3, r1, r2); an immediate operand multiplexer (mux) to select the immediate field as an operand (addi r3, r1, 2); an arithmetic/logic unit (ALU) (sub r3, r1, r2; xor r3, r1); a shifter (srai r3, 1), and an effective address adder to compute reg+offset (lw r3, 2(r1)).

You’ll also need a mux to select a result from the adder, logic unit, left or right shifter, return address, or load data; logic to check a result for zero, negative, carry-out, or overflow; a program counter (PC), PC incrementer, branch displacement adder (br L), and a mux to load the PC with a jump target address (call _foo); and a mux to share the memory port for instruction fetch (addr ? PC) and load/store (addr ? effective address).

Careful design and reuse will let you minimize the datapath area because the adder, with the immediate mux, can do the effective address add, and the PC incrementer can also add branch displacements. The memory address mux can help load the PC with the jump target.