ALU

The arithmetic/logic-unit consists of a 16-bit adder/subtractor and a 16-bit logic unit, which concurrently operate on the A and B registers.

LOGIC computes the 16-bit result of A and B, A or B, A xor B, or A andnot B, as selected by LOGICOP1:0. Each logic unit output bit is a function of the four inputs Ai, Bi, and LOGICOP1:0, and fits in a single 4-LUT. Thus, the 16-bit logic unit is a column of eight CLBs.

ADDSUB adds B to A, or subtracts B from A, according to its ADD input. It reads carry-in (CI) and drives carry-out (CO), and overflow (V). ADDSUB is an instance of the ADSU16 library symbol, and is 10 CLBs high—one to anchor the ripple-carry adder, eight to add/sub 16 bits, and one to compute carry-out and overflow.

Z, the zero detector, is a 2.5-CLB NOR-tree of the SUM15:0 output.

The shifter produces either A>>1 or A<<1. This requires no logic, so mux simply selects either SRI || A15:1 or A14:0 || 0. SRI determines whether the shift is logical or arithmetic.