January
1999, Issue 102
Wires,
Wires Everywhere
The
RF Solution
IT
SLICES...
The
second step in getting on the airwaves is selecting
the slicing time constant via the capacitor on the CTH
pin. The slicer cuts the data into 1s and 0s and consists
of a comparator with threshold determined by the voltage
on the CTH pin.
By
feeding the demodulated data through an RC low-pass
filter comprising an on-chip resistor RSC and the external
capacitor on CTH, the voltage is developed. The voltage
represents the average voltage of the data signal over
a period of time (the slicing time constant) against
which the instantaneous voltage of the data signal is
compared.
Consider
the extremes of zero and infinite slicing time. At zero
slicing time, the voltage on CTH exactly follows the
data. At infinite slicing time, the voltage on CTH remains
at zero. In both cases, the comparator has nothing meaningful
to compare against.
Figure
4 shows three example slicing time settings (v(2), v(3),
and v(4)) and illustrates what’s going on. Once again,
the choice of coding and further protocol comes into
play.
|
(Click
here to enlarge)
|
Figure
4—Configuring the optimal slicing
time constant is critical and depends on both protocol
(i.e., presence or absence of preamble or repeated
transmissions) and throughput requirements. |
For
instance, by sending a long preamble or repeated transmissions,
a relatively long time constant (e.g., 50 ms) produces
a nice even level for the comparator to work against.
Of course, the downside is that it takes relatively
longer to move a given amount of data.
By
contrast, if there’s little preamble or no repeated
transmissions, a shorter time constant (5 ms) is required
to get the comparator input ramped quickly. The problem
is that the steep slope creates pulse-width distortion
that impacts range.
Thus,
the overall goal is to choose the longest time constant
that is consistent with protocol and decode time constraints.
The datasheet indicates that a reasonable rule of thumb
is a slicing time constant equal to about five bit times.
Step
three is configuring the automatic gain control (AGC)
via the CAGC pin’s capacitor. The idea is to center
the dynamic range of the system around the local ether
noise level.
Setting
the attack/decay time constant with the capacitor on
the CAGC pin is similar to slicing time in that you
trade-off a smooth gain curve with minimum ripple for
a fast response. For instance, applications where the
receiver is constantly powered, there’s a lot of preamble,
and the decode time is leisurely give the AGC lots of
time to adjust, so a long time constant can be used.
The
final step to getting on the air is raising the antenna,
and the documentation does a good job of shedding light
on this rather black art. In short, the simplest and
best-performing setup is a quarter-wave length (e.g.,
inches = 2808/ftx in megahertz, or about 6–9², depending
on transmit frequency) piece of wire (monopole) connected
directly to the ANT pin.
Less
cumbersome options include coils of wire (helicals)
and PCB loops, although range is typically cut to 60
and 30 m, respectively.
Possible
enhancements include LC filtering to counter interference
from machinery located near the receiver or, at the
very least, a resistor offering a DC path to ground
affords some input protection from large EM spikes.
The antenna can also be located remotely via transmission
line, with the caution that an impedance-matched coupling
is necessary.
