January
2006, Issue 186
Portable
Web Server
Renesas
M16C Design Contest 2005 Entry
M32C/84
& CompactFlash
As
you can see in Figure 1, the server’s main hardware
components are the M32C/84 daughterboard, a CompactFlash
card interface, an RS-232-compatible modem interface,
and a control power supply. As the heart of the system,
the M32C/84 communicates directly with the CompactFlash
card and modem using its memory expansion bus and UART
interfaces (see Figure 2 (p. 52)).
|
(Click
here to enlarge)
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Figure
1—The dark area represents the web site module.
The Internet is connected via an external serial
modem. |
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(Click
here to enlarge)
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Figure
2—J1, J2, J4, and J5 connect to the M32C/84 evaluation
board. Note that the evaluation daughterboard isn’t
shown here. |
The
CompactFlash card interface connects to CompactFlash
memory cards, which gives the module access to up to
8 GB of solid-state flash memory. Flash memory uses
less power and is more reliable and rugged than conventional
hard drives. The downside is that there are a finite
number of times you can write to them. But this is a
non-issue for a web site that doesn’t need to be changed
too often.
The
CompactFlash card interface is a miniaturized version
of the 16-bit PCMCIA connector commonly found on PDAs
and laptops. A descendant of the PC’s ISA bus, the interface
consists of a 16-bit data path with an 11-bit address
space split into three main memory spaces: the I/O memory
space and the common memory/attribute spaces. The common
memory space is further decoded as attribute memory
if the *REG line is asserted.
Attribute
memory contains the plug-and-play, configuration-specific
data for the card. It is used during the initialization
process to determine the card’s capabilities and to
select an appropriate configuration.
The
CompactFlash interface can also operate in a legacy
IDE mode by grounding the *CSEL line. This makes the
CompactFlash card act like an IDE-compatible hard drive.
However, I decided not to do this because the full CompactFlash
interface allows connection to other types of cards
(e.g., Sandisk’s combined flash memory/Wi-Fi card).
I
interfaced the CompactFlash card to the M32C/84 expansion
memory bus in non-multiplexed mode 3. This was accomplished
via a single chip select line (*CS0) combined with M32C
address lines A10 and A11 to decode the various PCMCIA
address spaces. This memory maps the CompactFlash card
in the memory area of E00000 hex, allowing rapid communication
between the card and the CPU using memory access instructions
or the M32C SOUT/SIN block-copy-style assembler instructions.
The memory expansion timing was adjusted in the software
to provide the minimum 600-ns cycle time required for
the attribute memory accesses.
The
A10 line connects directly to the CF/REG address line.
A11 decodes the I/O and common memory. A10 is also present
on the CompactFlash connector, but CompactFlash cards
need only the first eight or so address lines. In addition,
the *BHE and A0 lines are used to enable the 8-bit byte
lanes for 8- or 16-bit access.
The
VHDL statements in Listing 1 probably
best describe the signal mappings. Note that the CE0,
CE1, IORD, IOWR, OE, and WE signals are CompactFlash
bus signals. The *WAIT wait-state input to the M32C/84
is connected directly to the CF RDY signal.
PLDs
are useful for rapidly prototyping high-speed interfaces.
I used a Xilinx 9572XL PLD for the bus’s signal mapping
because I had a couple of spares lying around. If you
produce a PCB, you could simplify this by using discrete
logic gates, which would reduce the number of programmable
devices.
Finally,
a dedicated PIO line from the M32C/84 provides a CF_RESET
line to the CompactFlash card. I found this to be necessary
for the software to reset the card to a known state
during the initialization and configuration processes.
