January
2006, Issue 186
Third-Generation
Rabbit
A
Look at the Rabbit 4000
EXPANDING
THE CPU
During
the six years since the introduction of the Rabbit 2000,
a great deal of code has been written for Rabbit microprocessors.
Much of the code is in the form of libraries written
by Rabbit engineers, and this experience provided many
of the requirements for this new design.
Probably
the biggest drawback to the existing CPU register architecture
is the relatively limited support for 16-bit quantities
and lack of support for 32-bit quantities. However,
to maintain backwards compatibility, it was important
to retain all of the existing registers without changing
their widths. The Rabbit 4000’s register architecture
addresses these issues (see Figure 1).
|
(Click
here to enlarge)
|
Figure
1—The Rabbit 4000 register architecture more than
doubles the resources available in previous generations
of Rabbit microprocessors. |
Readers
familiar with the Z80 will recognize most of the registers,
but we’ve added a new 16-bit register (JK) as well as
four new 32-bit registers (PW, PX, PY, and PZ). All
of these new registers have alternate versions.
The
existing HL register remains the default accumulator
for 16-bit calculations. When combined with the JK register
and new 32-bit instructions, the resulting JKHL register
becomes the new 32-bit accumulator.
The
four pointer (P) registers were originally requested
by Rabbit to be 24 bits wide. They were intended to
hold address pointers. Given that we had a 32-bit data
path, it made more sense to expand these registers to
32 bits and allow them to be used for data as well as
addresses.
When
used for data, these registers are general-purpose 32-bit
registers. But when an instruction calls for one of
these registers to be used as an address, the contents
of the register receive special treatment. This special
treatment is required because the Rabbit 4000 (like
the previous generations) has two types of addresses:
logical and physical.
Logical
addresses are 16 bits wide. The memory management unit
(MMU) automatically translates logical addresses into
24-bit physical addresses. Logical addresses save code
space and execution time at the expense of having a
limited range of memory available at any given time.
Physical
addresses in the Rabbit 4000 are 24 bits wide, but they
maintain backwards compatibility with the 20-bit addresses
of the earlier generations. Previous Rabbit devices
provided only two rather cumbersome instructions for
accessing physical memory. This was the initial reason
for adding the pointer registers.
The
special treatment of addresses in the pointer registers
enables them to be used to hold either logical or physical
addresses. If the upper word of a pointer register is
all ones, then the lower word of the register is used
as a logical address. Any other bit combination in the
upper word and the entire register is treated as a physical
address.
This
logical/physical decision is automatically handled by
the logic, enabling or disabling the MMU for the address
as appropriate. In addition, when loading a pointer
register from one of the regular registers, a 32-bit
load writes all 32 bits of the pointer register while
a 16-bit load automatically sets the upper word of the
pointer register to all ones.
Sometimes
it’s desirable to find out which physical address corresponds
to a given logical address. Figuring this out is normally
somewhat time-consuming because it involves duplicating
the operation of the MMU to generate the physical address.
The Rabbit 4000 adds two new instructions to perform
this conversion automatically. Two separate instructions
are required because the MMU can translate code differently
from data. To implement this feature, the CPU performs
a dummy read from the logical address, while at the
same time capturing the resulting physical address and
loading it back into the specified pointer register.
But
this conversion is only one way. A physical address
can correspond to more than one logical address or to
a logical address that isn’t available given the current
MMU programming. If the pointer register already contains
a physical address, it’s left unchanged.
