Answer 2—In NAND flash EEPROM memory, the transistors representing individual bits are connected in series, which means that the bit line will be pulled down only if all of the transistors are on—a NAND logical function. In NOR flash EEPROM memory, the transistors representing individual bits are connected in parallel, which means that the bit line will be pulled down if any of the transistors are on—a NOR logical function. The drawback of NOR flash memory is that the parallel connections require extra area on the chip, reducing the bit density relative to a NAND flash memory using the same design rules.

Contributor: David Tweed