May
2004, Issue 166
Test Your
EQ
|
Answer
6The two flip-flops
and two AND gates detect edges on the input signal synchronized
to the input clock. On the rising edge, the counter value
is captured in the upper latch and the counter is reset,
so X represents the period of the input signal. On the
falling edge, the counter value is captured in the lower
latch, so Y represents the high time of the input signal
and Y/X represents its duty cycle.
Contributor: David Tweed