Answer 1—Consider the circuit shown below:

The output of NAND gate 1 will be (A.B)!, and NAND gate 2 will be (C.D)!. Hence, the output of NAND gate 3 is Y = (A.B)! NAND (C.D)! = [(A.B)! . (C.D)!]!. Using de Morgan's theorem, you can simplify this to Y = A.B + C.D, which is equivalent to the AND - OR representation. Therefore, any SOP expression can be realized easily using only NAND gates. The first level requires as many gates as the number of variables, and the second level requires a single n input NAND gate, where n is the number of terms in the SOP expression. Hence, the SOP expression Y = A.B.C! + B.C + C.A! can be represented as:

Contributor: Naveen PN

Published August 2003