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DL 147:
Hardware/Software Co-Design of an Elliptic Curve Public-Key
Cryptosystem
This contribution
discusses an implementation of an elliptic curve public-key
cryptosystem on a programmable System-on-a-Chip (SOC). A complete
hardware implementation has limited flexibility but is ideally
suited for the implementation of the underlying finite field
arithmetic. A complete software implementation, on the other
hand, benefits the global control but suffers from efficiency
problems concerning the finite field arithmetic. We implemented
our design on the Atmel FPSLIC, a SOC that integrates a 40K
FPGA with an AVR microcontroller and a set of peripherals. We
use a standard basis representation for the field elements and
projective coordinates to implement the group operation. The
results concerning area are comparable with existing hardware
implementations. Although no attempts have been made yet to
reduce the critical path delay of the hardware part, we obtained
promising results towards speed and throughput. A maximum clock
frequency of 10 MHz is realized, but 200 MHz must be possible
after optimization.
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DIAGRAMS IN PDF FORMAT
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