1st Place

Lionel Theunissen

Complete Abstract

Versatile Communications Card for Linux

When engineers are expected to design hardware before a specification is complete, enough flexibility needs to be built into the design to accommodate any changes in function or specification. This is where the FPGA comes into its own. Generic hardware can be designed around the FPGA, and a functional design can be implemented when the specification is complete, or when changes are made, without modifying the PCB or other hardware.

Recently, I began experimenting with embedded systems using Linux. I needed to replace some obsolete ISA cards, and I wanted my new design able to be used for a variety of different interfaces and protocols, because I didn’t want to have to design a new card for each.

Designing a PCI interface card from scratch is not a trivial exercise. The hardware design and PCB, logic design for the FPGA, and driver software, all need to be completed before you can even test it with a line of application code! This communications card has been designed with the hobbyist in mind, and provides a generic hardware platform, which takes care of the difficulty of PCI interfacing, and allows you to concentrate on the FPGA logic design.

The sample application, describing an X.21 interface, with a driver for Linux, can be adapted easily for different purposes. Even non-communications applications are possible! Some possible uses include RS-232/-485 or X.21/X.22 communications, protocol conversion, communications encryption, replacement of obsolete ISA cards for legacy support, PCI prototyping, and FPGA experimentation.

2nd Place

Vitit Kantabutra

Complete Abstract

Better Adders for the AT40K FPGAs

Adder speed and size are undeniably crucial factors in determining the success of a family of FPGAs. The adders I presented are fast, small adders for the AT40K FPGA family. These adders are simple carry-skip adders specifically designed for FPGAs, where cells and interconnects are optimized for ripple chains. I composed ripple chains in a way that shortens the critical path delay significantly without too much cost.

As an example, I have completely designed a 16-bit adder and a 32-bit adder. The 16-bit adder is approximately 23.5% faster than its ripple counterpart, and is 37% larger. The 32-bit adder, on the other hand, is 34% faster than its ripple counterpart, while using only 28% more cells. On the contrary, a 16-bit carry-select adder automatically generated by Atmel’s IDS is more than three times as large as the ripple adder, and sometimes operates more slowly than ripple adders in practice.

Unlike the IDS’s carry-select adders, the carry-skip adders don’t duplicate ripple chains for any bit position. Instead, my adders divide the adder’s bit positions into groups, and determine inexpensively whether the carry into a group will be propagated through as a carry out of that group. If so, that group is said to be “skipped.” The carry out of a skipped group of bits can be determined with a multiplexer without having to wait for the carry in to ripple slowly through the bit positions of that group.

In my 16-bit adder, the 16 bit positions are divided into three blocks of sizes 5, 6, and 5. The 32-bit adder is divided up into blocks of sizes 10, 12, and 10. In both adders, the most and least significant blocks are just ordinary ripple adder blocks, but the middle block is a special block with a skip mechanism. No carry signal ripples slowly all the way through from LSB to MSB, making the worst-case delay much better than that of the ripple adder.