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Issue #208 November 2007
Analog Techniques
NimbleSig
A Compact DDS RF Signal Generator
by Thomas Alldread
Second Prize Luminary Micro DesignStellaris2006 Contest
Start | Design & Hardware | Assembly | Firmware | Calibration | Operating Procedure | Project Complete | Sources & PDF
CALIBRATION
The calibration procedure depends on a well-calibrated RF power meter (e.g., a Hewlett-Packard HP432A) to establish the absolute generator output level, the utilization of the precise 10-dB level steps obtainable from the DDS to establish the detector curve fit, the editing of constants defined in the source code, and the recompiling of the firmware. A spreadsheet, which is posted on the Circuit Cellar FTP site, can be used to calculate the values needed.
Photo 4 shows the modulation envelopes for different modulation frequency ranges. The envelope for frequencies less than 4 kHz looks quite classic as the 36 relatively fine modulation steps, which are hardly noticeable. The steps become more visible as the modulation frequency increases due to the execution time of the ISR, which limits the maximum interrupt rate to about 140,000 per second. This means the maximum number of steps with a 20-kHz modulation rate is seven or less. A six-step scheme was selected for this highest range because this permits the use of the same subroutine utilized for the lower modulation ranges. Although the higher modulation frequency envelopes look pretty rough in practice, the high-frequency ripple steps would be smoothed by the limited bandwidth of an audio receiver resulting in a restored low-distortion sine wave.
a) b)  c) d) |
| Photo 4—These are oscilloscope time domain displays of 50% amplitude modulation depth envelope photos for various modulation rates. The photos illustrate the decrease in step resolution as the modulation rate increases. The resolution is limited by the modulation ISR execution time. a—This illustrates the 36-modulation step resolution that is used when the modulation rate is between 1 Hz and 4 kHz. b—This shows 18-step resolution for between 4 and 8 kHz. c—Here you see twelve-step resolution for rates between 8 and 12 kHz, and the relatively coarse six-step resolution for modulation rates between 12 and 20 kHz (d). |
It may be possible to streamline the modulation ISR to increase the maximum interrupt rate, which would permit the use of finer modulation steps at higher modulation frequencies.
Photos 5a and 5b depict a clean spectrum down to about –70 dB. Photo 5c, which spans 0 to 1 GHz, shows the full band of interest and beyond with the generator running at full output (about –4 dBm). There is a pesky 100-MHz low-level carrier at about –57 dB and associated inter-modulation products between –55 and –60 dB down. The highest level spur at 800 MHz is probably the second harmonic of the clock, which I presume is leaking past the low-pass filter.
 a) b) c) |
| Photo 5—These are frequency domain spectrum analyzer displays of the NimbleSig generator output with a 40-MHz signal. Various spans are shown (from left to right): a 100-kHz span, a 20-MHz span, and a 0 to 1 GHz spectrum. |
It should be understood that the absolute level of the 100-MHz spur and some other spurs remain fairly constant irrespective of the DDS chip output level. Thus, if the output level of the DDS is reduced via the amplitude scale factor register value or due to losses at the upper frequencies, the relative level of the spurs increases proportionally. Generally, I found that at a full output level, the spurs remained below –50 dB relative to the carrier. For the purest output spectrum, the DDS should be run at full output level and an external attenuator should reduce the level when needed. For many applications, these spurs are low enough to be insignificant. In my contest documentation, I describe how to shift the frequency of troublesome DDS output spurs should there be a need to do so.
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