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Issue #208 November 2007
Analog Techniques
NimbleSig
A Compact DDS RF Signal Generator
by Thomas Alldread
Second Prize Luminary Micro DesignStellaris2006 Contest
Start | Design & Hardware | Assembly | Firmware | Calibration | Operating Procedure | Project Complete | Sources & PDF
ASSEMBLY
The component and bottom sides of the PC board are shown in Photo 2. The artwork is designed to an 8-mil clearance specification and the PCB stock is 1/32² FR10.
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| Photo 2—Here are both the component and bottom sides of the NimbleSig revision 2 bare PC board. The large center plated through hole in the center of the DDS footprint is there to enable you to solder the analog ground tab from the bottom side. The triple ground plane isolation is shown in the lower right. |
The PC board has three distinct, mutually isolated ground planes, which result in improved noise performance. The largest ground plane that extends to the left end of the board is the digital ground. The area in the center with the large plated through hole under the DDS footprint is the analog ground. The third ground plane on the right is the filter ground.
The solder pads are gold plated. Note that a silkscreen with component designations was omitted due to resolution limitations of the design software. Because the font sizes were too large, there was insufficient room on the board to clearly label the components without masking the solder pads. As a better alternative, a blowup pictorial of the silkscreen layer was used for component position reference during construction.
The plated through hole in the center of the DDS footprint enabled me to solder the analog ground tab of the DDS chip from the bottom side after I finished the component-side soldering. A brass set screw threaded through a tapped hole in the chassis provided a low-impedance chassis connection to further improve analog grounding (see Photo 3).
a) b)  c) d) |
| Photo 3a—The populated PCB is mounted in the chassis of the NimbleSig assembly prior to the installation of the shielding braid. b—The assembly has an external reference injection jack at the top and the RF shielding braid covers the center pins of the input/output jacks (jacks on the opposite bottom corners). c—The plastic sheet bottom isolation barriers are shown with the protruding solder bulb tip of the brass analog-ground-post screw. d—The brass ground post set screw has been removed, the soldered analog ground-plated through hole can be seen below the tapped screw hole, and the ground braid bonding of the triple ground planes is soldered to the threads of the gold-plated RF connectors. |
The RF detector IC is positioned in the lower-right corner of the board to provide maximum isolation from the DDS FRF output circuitry. The detector is surrounded by ground planes on both sides of the board, which tends to reduce stray RF coupling to the detector from the rest of the circuitry. Mounting pads for the polarity protection diode can be seen on the bottom of the board near the power injection input area.
The component area on the extreme left end of the PCB is the low-pass filter area. The DDS chip is to the right of the LPF section (see Photo 3). The rows of DDS pins on the left and bottom sides (pins 25–48) mainly carry the control signals between the MPU to the IC. The reference clock is injected on the right row (pins 1–12) and the output is taken from the top row (pins 13–24). Power and ground gets applied to multiple pins in all of the rows. The two 1.8-V power buses essentially circle the perimeter of the IC.
A fiber washer is used under the left mounting screw to ensure filter ground plane isolation is not compromised. Mylar insulation barriers are placed under the PCB to ensure the electrical isolation of the bottom side of the PCB from the chassis. The three ground planes are bonded together and grounded to the chassis via the body of the RF output SMB connector. A glimpse of the bonding braid can be seen in the bottom left below the corner of the PCB. The RF output and input connector center pins are partially shielded with an umbrella of braid.
The Coilcraft wideband output coupling transformer is within the white enclosure above the DDS chip. The TCXO is located to the right of the transformer. The pad for injection of an external reference is positioned along the edge to the right of the TCXO.
The JTAG connector is the eight-pin SIP socket along the edge above the MPU. Ground pin 8 is closest to the corner of the board. The 3.3-V power bus pin 7, which is not needed for the EVM, should be covered with a small piece of electrical tape. The removal of the mating pin on the ribbon cable completes a connector key.
The divide-by-four-counter IC is located on the left of the MPU. The digital power bus dual-3.3-V/1.8-V regulator is located near the power input port below the DDS IC. The analog power bus dual 3.3-V/1.8-V regulator is located on the right end of the PCB above the Analog Devices AD8307 RF power detector IC. Although the regulators perform well, they are tiny! They are difficult to solder without an oven because of the grid array-type, leadless package.
The mounting pads for the optional RF output amplifier
chip and associated components can be seen in the bottom-left corner close
to the RF output connector. Photos 3a and 3d show the grounding braid
used to shield the center pins of the RF connectors. This improves the
dynamic range of the RF detector and reduces the coupling of the 100-MHz
synchronization clock spur into the output spectrum.
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