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Issue #216 July 2008
Second Place Microchip 2007 Design Contest
’Net-Enabled Alarm Clock
by DJ Delorie
Start | System Overview | Network | Display | MP3 | ADC | Memory | Power | Software | Time | Alarms | GUI | Remote Protocols | Construction & Packaging | Smart Combinations | Sources & PDF
MP3
The MP3 chip is an STA013 MP3 decoder, which is actually a custom DSP chip. It talks over both an I2C bus and a SPI bus. The I2C bus is used to configure the DSP and control it, such as changing the volume.
The SPI bus provides only MP3 data. Because it is smart enough to skip over non-music data, the PIC24FJ64 does not need to interpret the MP3 stream—it just feeds it to the decoder, so you can use unmodified MP3 files. There are two such files stored in the EEPROM. One is a moment of silence to help reset the DSP’s sequencer. The other is the default “beep” sound the alarm uses if it can’t contact a music server. The MP3 decoder has the third crystal oscillator in the project: a 14.318-MHz clock circuit.
The output of the MP3 decoder is a serial digital audio stream, which is fed into a serial DAC chip. The chip’s two outputs are level-adjusted and fed into a pair of differential-drive amplifiers, which can provide 5 W into an 8-W speaker and will run off up to 18 V, so no regulator is required. The amplifiers have a separate volume control pin, so a single voltage reference can control both channels.
The voltage reference is created by the volume control potentiometer R307; it is offset to a range of 0.4 to 1.0 V by R306 and R308. This matches the useful range of the amplifier’s control pin. The voltage at this point is fed into one of the ADC inputs of the PIC24FJ64, so it can monitor the volume setting (see Figure 3). In addition, the PIC24FJ64 can turn that pin into an output, set it low, and force the volume control low enough that the amplifier goes into a low-power standby mode. This gets rid of the tiny residual noise that the amplifier produces when it’s active. The resulting voltage is buffered by U304, so the load from the amplifiers doesn’t distort it.
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| Figure 3— The resistor network’s high impedance enables the microcontroller to monitor the volume through its ADC or override it by reconfiguring that pin as a logic-low GPIO output. The op-amp provides a low-impedance copy of the signal to the amplifiers. |
The audio module also uses the greatest range of power sources. The STA013 runs off 3.3 V, but it needs an isolated supply for its PLL, which is provided by two 4.7-W resistors R303 and R304 and bypass capacitor C306. These form a high-current low-pass filter. The DAC chip runs off 5 V so it can produce an output of sufficient amplitude. The amplifiers run off the raw power from the wall wart, which ranges from 16 V at idle to 12 V under full load.
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